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CISCO SDE Online Assessment - Electronics / Digital Section

Technical multiple-choice questions from the Electronics / Digital section of the CISCO SDE on-campus online assessment. The section covers RTL / flip-flop inference, PCM quantization noise and binary number representation. Each question has exactly one correct option.

Question 1

How many flip-flops will be inferred for the following code?

output reg q;
input d;

always @(posedge clk)
begin
    while(1)
        q <= d;
end

A) 0
B) 1
C) 2
D) Infinite - the loop cannot be synthesized

Question 2

In a PCM system the quantization step-size is 2 V. If the step-size is reduced to 0.25 V, by what factor does the quantization noise power decrease?

A) 8
B) 16
C) 64
D) 512

Question 3

The number of 1's in the binary representation of (3 x 4096 + 15 x 256 + 5 x 16 + 3) is?

A) 8
B) 9
C) 10
D) 12