Build a 2048 × 128 Memory From 1024 × 64 Macros - Cadence Pune OA Question | OAHelper

Company: Cadence Pune

Difficulty: medium

Problem Statement

Build a 2048 × 128 Memory From 1024 × 64 Macros Write Verilog/VHDL to implement a 2048-deep, 128-bit memory using 1024-deep, 64-bit predesigned RAM macros. The user port has active-high MemEnable and Wr_nRd (1 write, 0 read); the macro has active-low nChipEnable and nWrEnable (0 write, 1 read).

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